1. Technical Field
The present invention relates to a solid-state imaging device in which a plurality of light receiving sections made of pn photodiodes and the like are formed on a semiconductor substrate, and particularly relates to a backside-illumination-type solid-state imaging device having a wiring layer formed on one surface of a semiconductor substrate and a light receiving section that photoelectrically converts light incident from the other surface of the semiconductor substrate.
2. Background Art
In recent years, high quality and compactness are desired for a solid-state imaging device, and pixel size reduction is frequently adapted. However, the pixel size reduction has physical limitations, and there is an occurring problem that an area of a photodiode for converting light into electric signals must be made smaller as the pixel size becomes smaller, and sensitivity to light diminishes.
In a typical solid-state imaging device, a wiring for outputting the signals converted in each photodiode to outside is formed on a semiconductor substrate on which a plurality of photodiodes are formed. Since light is made incident from a side of the surface on which the wiring of the solid-state imaging device is formed, light is collected by using a microlens and the like so that the incident light can pass though the wiring. However, when the wiring becomes complicated and becomes a multilayer wiring, even if the light is collected by the microlens, vignetting of the incident light occurs due to obstacles such as the wiring, and it becomes impossible to obtain sufficient sensitivity.
Thus, recently, a backside-illumination-type solid-state imaging device that injects the light from a surface on an opposite side of a surface onto which a wiring is formed is proposed. With the backside-illumination-type structure, it is possible to make an aperture ratio of each pixel ideally at 100%, and the sensitivity can be maintained even if the pixel size is reduced. However, since the backside-illumination-type solid-state imaging device is configured to inject the light from the surface on the opposite side of the surface onto which the wiring is formed, in order to manufacture the backside-illumination-type solid-state imaging device, a special manufacturing process is necessary for thinning a thickness of the semiconductor substrate onto which the light receiving sections are formed.
As a method of manufacturing the backside-illumination-type solid-state imaging device, typically, a method that uses an SOI (Silicon On Insulator) substrate is known, in which after having formed respective layers such as the light receiving sections, the wiring, and the like on the SOI substrate, a supporting substrate is bonded thereto, and the silicon substrate on a back surface side of the supporting substrate is removed. However, in removing the silicon substrate, damage is applied to light receiving sections, and defect levels of a substrate interface are generated in the light receiving sections by this damage. In this case, there had been a problem that, even if the solid-state imaging device is in a darkened state (a state in which no signal charge is present that is to be photoelectrically converted in the light receiving sections), charges are detected by the defect levels of the substrate interface in the light receiving sections, and the dark current (noise current) is generated. Accordingly, even if the sensitivity to the incident light is increased by employing the backside-illumination-type solid-state imaging device, whereas on the other hand if the dark current increases, it practically becomes impossible to use it as the solid-state imaging device.
Conventionally, techniques to prevent this dark current have been proposed (refer to Unexamined Japanese Patent Publication No. 114-38872, Unexamined Japanese Patent Publication No. 2008-306154, and Unexamined Japanese Patent Publication No. 2008-306160). Hereinbelow, two conventional techniques for preventing the dark current will be described with reference to the drawings.
FIG. 8 is a cross-sectional view of a solid-state imaging device of a first conventional technique disclosed in Unexamined Japanese Patent Publication No. 114-38872.
As shown in FIG. 8, solid-state imaging device 800 of the first conventional technique includes p-type semiconductor substrate 801, first n-type semiconductor layer 802 and second n-type semiconductor layer 803 formed on p-type semiconductor substrate 801, p-type semiconductor layers 804 formed on p-type semiconductor substrate 801, silicon oxide film 805 formed on first n-type semiconductor layer 802, second n-type semiconductor layer 803, and p-type semiconductor layers 804, and gate electrode 806 formed on silicon oxide film 805 above second n-type semiconductor layer 803 and p-type semiconductor layer 804.
Further, in solid-state imaging device 800 of the first conventional technique, negative fixed charges are embedded by implanting aluminum ions into silicon oxide film 805, whereby negative charge region 807 is formed. That is, negative charge region 807 as a hole accumulation layer is formed by bringing up a surface potential of p-type semiconductor substrate 801. In this way, the solid-state imaging device of the first conventional technique configures an insulation film interface between p-type semiconductor substrate 801 and silicon oxide film 805 to be non-depleted by forming the hole accumulation layer, and thereby electrons generated at an interface level is suppressed, and an occurrence of dark current is prevented.
Next, solid-state imaging devices of a second conventional technique disclosed in Unexamined Japanese Patent Publication No. 2008-306154, Unexamined Japanese Patent Publication No. 2008-306160 will be described.
FIG. 9 is a cross-sectional view of solid-state imaging device 900 of the second conventional technique.
Solid-state imaging device 900 of the second conventional technique is a backside-illumination-type solid-state imaging device, and as shown in FIG. 9, includes semiconductor substrate 901, and light receiving section 902 and peripheral circuit section 903 formed on semiconductor substrate 901. Film 904 that lowers an interface level and film 905 including negative fixed charges are formed on light receiving section 902. Insulation film 906 is formed on film 905 including the negative fixed charges, and light-shielding film 907 is formed on insulation film 906 above peripheral circuit section 903. Further, insulation film 908 having transparency to incident light is formed on film 905 having the negative fixed charges above light receiving section 902. Further, color filter layer 909 and light condensing lens 910 are formed on insulation film 908.
In solid-state imaging device 900 of the second conventional technique, since film 905 including the negative fixed charges is formed on film 904 that lowers the interface level, hole accumulation layer 911 is formed on a light receiving surface side of light receiving section 902 due to an electric field caused by the negative fixed charges. Accordingly, the generation of the charges from the interface is suppressed, and the dark current caused due to the interface level can be suppressed.
As described above, solid-state imaging device 800 of the first conventional technique and solid-state imaging device 900 of the second conventional technique form the hole accumulation layer by using the negative fixed charges, and thereby suppress the dark current caused by the interface level.